The following pages discuss multicore architecture that was developed in the 1998-2000 timeframe in conjunction with Infinite Technologies Inc. It was quite revolutionary at the time. The underlying IP discussed is licensable and available for commercialization. Contact us for details

A Reconfigurable Bus Architecture IP99 paper.pdf

Configurable Bus Arbitration for Multiple IP Blocks.pdf

RAMA: A Reconfigurable Datapath SoC Architecture.pdf

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 GreenSocs -   www.greensocs.com

The following white papers discuss debug architectures developed in the 2002-2007 timeframe in conjunction with First Silicon Solutions and later MIPS technologies. All references acknowledge the FS2/MIPS connection and their respective trademarks, copyrights, etc.  

The following is a keynote address on emerging multicore debug issues given in April 2007 at the ECSI Institute Workshop on
Systems-on-Chip Debug Standards

On Chip Debug - What Do We Have ... What Do We Need.pdf